1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device and, more particularly, to a method of manufacturing a semiconductor device including a trench capacitor.
2. Description of the Related Art
In the field of a semiconductor integrated circuit, a trench capacitor is well-known as a capacitor capable of achieving a large capacity in a small area. FIG. 1 is a cross-sectional view showing a conventional typical structure of the trench capacitor.
In FIG. 1, reference numeral 1 denotes a P-type semiconductor substrate, 2 indicates an N-type diffusion layer, 3 and 5 show insulating films, 4 and 6 indicate polysilicon layers, and 7 denotes an interlayer insulating film. Diffusion layer 2 and polysilicon layer 4 serve as both electrodes of the trench capacitor, and insulating film 3 serves as a dielectric film of the trench capacitor. Polysilicon layer 6 is embedded in a groove to flatten the surface of a semiconuctor body and is electrically insulated from polysilicon layer 4 by insulating film 5.
Referring to FIGS. 2A to 2C, an explanation will be given of a manufacturing process in the case where polysilicon layer 6 is embedded into the groove.
As illustrated in FIG. 2A, insulating film 5 is formed on polysilicon layer 4 and then polysilicon layer 6 is formed on the entire surface of insulating film 5 so as to fill up the groove. As shown in FIG. 2B, etching is performed, using insulating film 5 as a stopper of the etching, so as to make polysilicon layer 6 remain only in the groove. Next, insulating film 5 formed on the surface of polysilicon layer 4 is removed by wet etching, and then polysilicon layer 4 serving as a capacitor electrode is patterned. When insulating film 5 is removed by the wet etching, however, the surface portions of insulating film 5 between polysilicon layers 4 and 6 are over-etched, as shown by broken lines A and B in FIG. 2C.
As illustrated in FIG. 2C, therefore, not only the surfaces of polysilicon layers 4 and 6 but also the sides thereof are exposed. If polysilicon layers 4 and 6 are thermally oxidized to form an interlayer insulating film in this state, a stress is laterally applied to polysilicon layers 4 and 6, and a strong stress is caused in the regions represented by broken lines A and B in FIG. 2C. The stress degrades the withstanding voltage of insulating film 3 and reduces the reliability of the trench capacitor. As a result, defective crystals (shown by x) are easy to occur in the vicinity of the groove in substrate 1 by the stress applied to polysilicon layers 4 and 6. These defective crystals cause a leak or the like to be generated.
Furthermore, the conventional method of manufacturing the semiconductor device requires a manufacturing step of forming insulating film 5 as a stopper when polysilicon layer 6 is removed by etching, and a manufacturing step of removing insulating film 5 for patterning of polysilicon layer 4. The manufacturing steps are thus complicated.